Display Bridge and Hub components facilitate the link between application processors and displays by combination of a large variety of industry interface standards. Serial (MIPI® & MDDI®) and parallel host interfaces can output the content to displays with parrallel, serial (MIPI®) or LVDS connectors. In addtion multiple displays can be realized by MIPI® DSI hubs (1 DSI in, multiple DSI out).
Toshiba's Display Bridge/Hub has various display interfaces to facilitate design of feature-rich mobile equipment realizing superb picture quality.
Examples of Display Bridge Configurations
MDDI® to DSI-Display Bridge / TC358760/61XBG
Features
- Support MDDI® 1.2 Direct refresh (60 fps) up to FWVGA
- LCD-I/F: MIPI® DSI 3lane
- Multiple display bridges:
MDDI®->DSI/DPI/DBI, DPI/DBI->DSI
- Resolution: Up to qHD, HXGA (DPI-to-DSI mode)
- Host interfaces: MDDI® 1.2 Type 1, DPI 24-bit , DBI-B 16-/18-bit
- LCD interfaces: DSI, DPI, DBI
- Read more... (pdf 673KB)
General Specifications
General Specifications of the TC358760XBG and TC358761XBG
| Supply voltages |
1.2 V (Core), 1.2 V & 1.8 V (MDDI® I/O),
1.8-3.3 V (I/O) |
| Package dimensions |
TC358760XBG: 3.5mm × 3.5mm (49 pins)
TC358761XBG: 4.5mm × 4.5mm (72 pins) |
| Status / Availability |
Mass production
|
DPI/DBI to DSI-Display Bridge / TC358763XBG
Features
- LCD-I/F: MIPI® DSI 3lane
- Multiple display bridges:
(DPI/DBI->DSI)
- Resolution: Up to qHD, HXGA (DPI-to-DSI mode)
- Read more... (pdf 668KB)
General Specifications
- Host I/F:DPI 24bit/DBI-B 16/18bit
- LCD I/F:DSI
General Specifications of the TC358763XBG
| Supply voltages |
1.2 V (Core), 1.2 V & 1.8 V (MIPI® I/O), 1.8-3.3 V (I/O) |
| Package dimensions |
TC358763XBG: 4.5mm × 4.5mm (72 pins) |
| Status / Availability |
Mass production
|
MIPI® Display Bridge / TC358762XBG
Features
- Host interface: MIPI® DSI
- Parallel display outputs: MIPI® DBI Type B, MIPI® DPI
- SPI, MIPI® DBI Type C and GPIOs for traditional peripheral interfaces, and I2C interface for internal register access
- qHD @70 fps (MIPI® DPI), FWVGA @60 fps (MIPI® DBI Type B)
- The source of the internal system clock is selectable from the DSI Clock or a clock derived by multiplying an external clock with on-chip PLL..
- Read more... (pdf 672KB)
General Specifications
General Specifications of the TC358762XBG
| Supply voltages |
1.2 V (Core), 1.2 V (MIPI® I/O), 1.8-3.3 V (I/O) |
| Package dimensions |
5.0mm × 5.0mm (64 pins) |
| Status / Availability |
Mass production
|
MIPI® DSI to LVDS Bridge / TC358764XBG, TC358765XBG
Features
- Host interface: MIPI® DSI (DSI RX 4 lane)
- Single Link(TC358764XBG), Dual Link (TC358765XBG)
- I2C (master) and GPIO interfaces for peripheral device control and I2C (slave) interface for on-chip register programming
- TC358764XBG : Up to WXGA resolution (1366 × 768, 24 bpp)
TC358765XBG : Up to WUXGA resolution (1920 × 1200, 18 bpp)
- Read more... (pdf 825KB)
General Specifications
General Specifications of the TC358764XBG, TC358765XBG
| Supply voltages |
1.2 V (Core), 1.2 V (MIPI® I/O),
3.3 V (LVDS I/O), 1.8-3.3 V (I/O) |
| Package dimensions |
TC358764XBG : 5.0mm × 5.0mm 0.65mm Ball pitch (49 pins)
TC358765XBG : 6.0mm × 6.0mm 0.65mm Ball pitch (64 pins) |
| Status / Availability |
Mass production |
MIPI® DSI Hub / TC358710XBG
Features
- Hub for up to three displays
- Host interfaces: MIPI® DSI, MIPI® DBI Type B (CPU interface)®
- Display outputs: MIPI® DSI, MIPI® DBI Type B, MIPI® DBI Type C
- Read more... (pdf 727KB)
General Specifications
General Specifications of the TC358710XBG
| Supply voltages |
Single 1.8 V |
| Package dimensions |
4.0mm × 4.0mm (81 pins) |
| Status / Availability |
ES Available
|
MIPI DSI to DisplayPort® TC358766XBG
Highlights
- DSI to DisplayPort® Bridge, D2DP, is used to convert a DSI or DPI video stream into a DisplayPort® interface one
- The target applications are devices with large Display Panels, such as MID, Tablet or PC
- The inputs are driven by a DSI Host with 4-Data Lanes @1 Gbps/lane or DPI Host with pixel clock @154 MHz (max)
- Up to WUXGA (1920x1200) @24-bit, 60fps with reduced blanking ? 3.7 Gbps
- Embedded I2S-type audio data into DP’s secondary packets
- Two DP data lanes are provided
- Can be used either as one link to drive a high resolution panel or as two links to drive two independent panels
- HDCP is used for content protection
- Debug/Test Port: I2C Slave
Features
- DSI-RX
- Support burst and non-burst mode Video Data
- Video data packets are limited to one packet/row per Hsync period
- Four Data Lanes with bi-directional support at Data Lane 0
- Maximum speed @ 1 Gbps/lane
- Video input data formats: RGB-565, RGB-666 and RGB-888
- Maximum video input frame size
- WUXGA (1920 x 1200) 24-bit @60 fps
- Does not support Interlaced video and deep color pixels
- DPI – parallel RGB input port
- MIPI DPI v2.00 Compliant
- Up to 16 / 18 / 24 bit parallel data interface
- Maximum Clock speed at 154 MHz
- Video input data formats supported:
- RGB-565, RGB-666 and RGB-888
General Specifications
General Specifications of the TC358766XBG
| Supply voltages |
1.2V (Core), 1.2V & 1.8V (MIPI® I/O), 1.8V - 3.3V (I/O)
|
| Package dimensions |
TC358766XBG: 8mm x 8mm (100 pins), 0.65mm pitch, 1.2mm height
|
| Status / Availability |
Under Development
|
Further Information
MPD (Mobile Peripheral Devices)
MIPI® word marks and logos are service marks owned by MIPI Alliance, Inc.
MDDI® is a trademark of the Video Electronics Standard Association (VESA)
DisplayPort® is a trademark of Video Electronics Standard Association (VESA)
Display Bridge/Hub