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USB 2.0 PHY - IP Solution for USB

Toshiba’s USB 2.0 PHY is an IP block that provides an advanced, flexible and future-proofed solution for system designers looking to quickly and easily integrate USB functionality into a system-on-chip (SoC) ASIC. The PHY provides physical layer functionality for USB 2.0 and is used as the interface between the USB Host or Device Controller and the USB system.

USB PHY Process

Features of USB 2.0 PHY

USB 2.0 specification compliance
UTMI+L3 interface
Integrated 45? termination resistors, 1.5k? pull-up resistors, 15k? pull-down resistors
480Mbps (HS), 12Mbps (FS), 1.5Mbps (LS) transmission rates
Supports serial data recovery function on USB
Supports SYNC/End-of-Packet (EOP) and check functions
Supports bit stuffing, bit unstuffing and bit stuffing error detection functions
Supports Non Return to Zero Invert (NRZI) encoding and decoding functions
Supports parallel-to-serial and serial-to-parallel data conversion
Supports Suspend and Resume functions
Supports the USB 2.0 test mode
Generates a 480MHz clock for HS operation using an integrated PLL
Can use a 12MHz crystal oscillator or 12MHz external clock as a reference clock source
Supports tuning functions to optimise analogue characteristics
Supports VBUS Detection Circuit

Fully silicon-proven, Toshiba’s USB 2.0 PHY is available for seamless integration in following advanced CMOS processes:

  • TC340 40nm 1.0V Process
  • TC320 65nm1.2V process
  • TC300 90nm 1.2V process
  • TC280 130nm 1.5V process (without OTG functionality)

The IP is supplied as a mixed-signal hard macro and GDSII, abstracts, models for major EDA tools and detailed application notes are all available.

ASIC & Foundry USB 2.0 Flyer (pdf 1533KB)

US Block

USB 1.1 I/O for FS / LS

USB PHY IPFor Full Speed (FS) and Low Speed (LS) serial data transmission, Toshiba also offers an optimized USB1.1 I/O solution which complies with the Universal Serial Bus specification rev.1.1.

Toshiba’s USB1.1 I/O is silicon-proven and ready for integration in the following CMOS processes:

  • TC340 40nm 1.0V process (under planning)
  • TC320 65nm 1.2V process
  • TC300 90nm 1.2V process
  • TC280 130nm 1.5V process
  • TC260 180nm 1.5V process

Contact the team for further information

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