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Intellectual Properties (IP)

(Building Blocks - Silicon IP: Key for Re-use & Productivity)

Today‘s state-of-the-art custom System on Chip (SoC) solutions require complex analogue and mixed-signal capabilities, as well as digital building blocks such as processors, peripherals, cores, codec- and other complex functions to be integrated on silicon.

A broad, flexible and reliable line-up of pre-verified, standard compliant Intellectual Property (IP) blocks is key for first-time-right silicon with shortest turn-around times and efficient effort investments.

As a broad-liner and market leader in SoC technology, Toshiba is the right partner for IP-rich complex SoC products, offering optimal solutions and support for:

Toshiba ASIC & Foundry Mixed-Signal IP Strategy

Toshiba has recognised the significant limitations of using IP from third party design houses and has established a unique strategy that ensures complex analogue and mixed-signal hard macro IP cores can be easily integrated into silicon with minimum turn-around-time (TAT) and risk. 

More about:

  • The importance and challenges of process-dependent IP
  • Toshiba's minimum risk IP strategy
  • IP development and support (IDM model)
  • Customer developed mixed-signal IP
  • Supporting SoC implementation

Can be found inside the Mixed-Signal IP Strategy White-Paper (pdf 937KB)
 

Digital RISC Processor Cores

Embedded Memories Macros

No system with micro-controller works without memory! Toshiba offers a wide line-up of various types of embedded memory.

And if on-chip memory will not fit, Toshiba provides solution with memory dies in System-in-Package (SiP).
 

Basic Mixed Signal Cores

Toshiba offers a large portfolio of basic mixed-signal cores.  Our local mixed-signal engineering expert team supports Q&A around applications and feasibility studies, implements and adapts / customize IP for specific applications.

Digital Framing Blocks & Processor Peripherals

  • USB Controller (universal serial bus)
  • Ethernet MAC (media access controller)
  • JPEG (joint photographic expert group)
  • MPEG (moving picture expert group)
  • Memory Controller (SRAM, SDR, DDR, DDR2, Flash, ...)
  • DMA Controller (direct memory access)
  • many others

Synthesisable cores from Toshiba Semiconductor or leading 3rd party IP vendors. For further information, please contact the ASIC & Foundry team.
 

Connectivity IP and Physical Interfaces

  • Flat Panel Display (FPD) LVDS Transmitter and Receiver mixed-signal IP core
  • USB 2.0 PHY and OTG FS/HS (universal serial bus on-the-go with full-speed/high-speed)
  • MIPI-D-PHY
  • DDR, DDR2 (HSTL, SSTL2, SSTL1.8) (double data rate with high-speed transceiver logic or stub series terminated logic)
  • S-ATA (serial advanced technology attachment)
  • PCI-Express (peripheral component interconnect)
  • Multi-Rate/Protocol SerDes up to 10 GHz (serializer / de-serializer) - OIF, XAUI, FibreChannel, ...
  • HDMI (high definition multimedia interface) and DVI (digital video interface)
  • General Purpose LVDS I/O

Hard-macros implemented by Toshiba Semiconductor for various CMOS technologies. For further information, please contact the ASIC & Foundry team.
 

Mixed-Signal Application Support Teams

Toshiba has a strong in-house workforce with several local development teams supporting automotive, multimedia and wireless designs and who are available to tailor either existing IP or cells or develop new cells to meet the needs of the customer.

For further information, please contact the ASIC & Foundry team.

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