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Cortex™ R4F

  • ARM PoweredARM 32-Bit RISC processor based on the new ARMv7-M architecture
  • Superscalar dual-issue 8-stage pipeline
  • Thumb®2 instruction set is backward compatible to Thumb ISA
  • Cortex R4F Block DiagramAMBA® 3 AXI™ protocol with 64-bit master port and optional 64-bit slave port
    1.6 DMIPS/MHz
  • Vectored Interrupt Controller (VIC) included
  • Non-maskable interrupt (NMI) to follow the requirements of realtime applications
  • CoreSight™ debug and trace technology
  • The Optional Floating Point Unit (FPU) in Cortex™ -R4F is IEEE754 compatible
  • A very efficient Branch prediction and prefetch unit
  • ECC technology monitors memory accesses to detect and correct errors
  • Synthesis optional features:
    • Floating Point Unit (FPU)
    • Memory Protection Unit (MPU)
    • Cache controller and cache size
    • Either one, two or three TCM ports can be included
    • Number of breakpoints and watchpoints can be selected

Features / Services from Toshiba

  • Performance tbd
  • Flexible and synthesizable memory and core configuration

Benefits

  • Optimum performance at lowest possible cost
  • software compatible with the ARM9E family of processors

Applications

  • Embedded applications including computer peripheral, real-time systems and wireless modems

Images courtesy of ARM® Limited - www.arm.com

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