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ASIC Technology

The CMOS (complementary metal oxide semiconductor) technology is the base for Toshiba’s custom LSI (large scale integration) products. Toshiba is continuously investing in fabrication capacity and advanced process development.

 

Toshiba CMOS Technology Roadmap for ASIC

Toshiba has already started process development for the technologies of geometries smaller than 65nm.  However, production of mature technologies, is still available for design starts.  Toshiba has no plans to discontinue production, (for example, 1.0um technology, introduced in 1986 is still in production.)

Note: The CMOS Technology roadmap is an interactive element. Please select the technology by moving your cursor over the image and you will get key feature / target applications listed in a text-box.

Please contact the ASIC & Foundry team for further information TC190 • 0.6um gate length • 0.6um node • 5V core supply • 3.3/5V IO • 48V High-Volt option For industrial and legacy applications with 5V supply TC200/TC203 • 0.4um gate length • 0.6um SIA node • 3.3V core supply • 3.3/5V IO • 18V High-Volt option For mixed-signal and industrial applications with V TC220/TC223 • 0.3um gate length • 0.4um node • 3.3V core supply • 3.3/5V IO For low-end products and consumer applications with 3.3V supply TC240 • 0.25um gate length • 0.25um node • 2.5V core supply • 2.5/3.3/5V tolerant IO For mixed signal SoC integrations TC260 • 0.14um gate length • 0.18um node • 1.5V core supply • 1.5/1.8/2.5/3.3/5V tolerant IO For cost sensitive consumer applications TC280 • 0.11um gate length • 0.13um node • 1.5V core supply • 1.5/1.8/2.5/3.3/5V tolerant IO For complex terminal, networking and telecom products TC300 • 65nm gate length • 90nm node • 1.0/1.2V core supply • 1.8/2.5/3.3V IO For digital consumer and high-end telecom products TC320 • 50nm gate length • 65nm node • 1.0/1.2V core supply • 1.8/2.5/3.3V IO For digital consumer, low-power mobile and high-end telecom products Please contact the ASIC & Foundry team for further information TC190 • 0.6um gate length • 0.6um node • 5V core supply • 3.3/5V IO • 48V High-Volt option For industrial and legacy applications with 5V supply TC200/TC203 • 0.4um gate length • 0.6um SIA node • 3.3V core supply • 3.3/5V IO • 18V High-Volt option For mixed-signal and industrial applications with V TC220/TC223 • 0.3um gate length • 0.4um node • 3.3V core supply • 3.3/5V IO For low-end products and consumer applications with 3.3V supply TC240 • 0.25um gate length • 0.25um node • 2.5V core supply • 2.5/3.3/5Vtolerant IO For mixed signal SoC integrations TC260 • 0.14um gate length • 0.18um node • 1.5V core supply • 1.5/1.8/2.5/3.3/5V tolerant IO For cost sensitive consumer applications TC280 • 0.11um gate length • 0.13um node • 1.5V core supply • 1.5/1.8/2.5/3.3/5V tolerant IO For complex terminal, networking and telecom products TC300 • 65nm gate length • 90nm node • 1.0/1.2V core supply • 1.8/2.5/3.3V IO For digital consumer and high-end telecom products TC320 • 50nm gate length • 65nm node • 1.0/1.2V core supply • 1.8/2.5/3.3V IO For digital consumer, low-power mobile and high-end telecom products Please contact the ASIC & Foundry team for further information Please contact the ASIC & Foundry team for further information Please contact the ASIC & Foundry team for further information Please contact the ASIC & Foundry team for further information ASIC Roadmap

As a result of this long term strategy, a variety of technologies ranging from mature 0.6um down to advanced 65nm transistor channel length technologies are available for design start today (2006).  Customers can select the one that best fits their specific product requirements in terms of cost and performance, voltage/power constraints and cell/block availability.  Mature technologies offer high voltage options (18V/48V), later technologies offer several process options for low power, high speed, low leakage current and precise analogue functions.  All technologies support a wide range of different I/O (input/output) voltages. 

More information about different technologies are available in our product flyer:

If you require further information please contact the ASIC & Foundry team.
 

Universal Array (™)

Universal Array ™ is a new system-on-chip (SoC) design platform that significantly reduces the development time for SoC devices.  By applying Universal Array ™ , Toshiba has cut the turn-around-time for production of engineering samples for 130nm and 90nm process technology significantly.  Further details could be found here.


Toshiba CMOS Technology for Foundry

All Toshiba CMOS technologies are available for foundry business.  Mature technology production is at Iwate plant (0.6um ... 0.35um on 6 inch wafer).  While mainstream and advanced technology production is at Oita plant (0.25um ... 0.13um on 8 inch wafer and from 90nm onwards on 12 inch wafer).  Further production service details can be found here.

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