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Design Service For ASIC

Toshiba’s ASIC & Foundry Support Organisation

Toshiba‘s Application, Design and Implementation teams in Düsseldorf (Germany) and Tokyo (Japan) support specification, development, implementation and verification of customer products.  The European based ASIC & Foundry Solution team will help to find the optimal technical and commercial solution for the target application, including selection of technology, package, specification, design and verification of microcontroller sub-systems, and selection and pre-verification of IP blocks.


Toshiba’s Design And Implementation Service

In the implementation phase, the customer’s project will be supported by the Design and Implementation team, also based in Germany.

Toshiba will assign one full-time, fully dedicated project manager from the Design Centre.  He/She will manage the entire implementation process, in addition to leading the synthesis (if required), net-list and timing verification activities.  The project manager will be assisted by experts for DFT and test-pattern generation.

Physical implementation (layout), timing closure and signal integrity verification will be done in Düsseldorf by the Physical Design team.  One dedicated layout engineer will be responsible for the customer’s project.  During hot phases, additional layout engineers will assist him/her as required.  Regular project review meetings at the customer’s premises or in Düsseldorf are part of the specification and implementation process.

The final layout data (GDSII) will be transferred to the Toshiba Engineering team in Japan, who will manage mask making, sample wafer production, packaging, test program generation and testing (if required).  Prototype material is shipped back to the customer, and the European Toshiba organisation (with backup from Toshiba Japan) will assist in evaluation towards prototype approval and ramp up of mass production.

Second level expert support will also be provided locally from Germany, with EDA experts (Toshiba's SoC EDA Tools) providing consultation and managing the tool and library chain.  Analogue and mixed signal design teams are available for design or modification of special cells or functions, and mixed signal application experts support the design-in of these blocks into the target products.  Package experts take care of package selection and implementation, considering all physical, electrical, and thermal effects.

Note: The Design & Implementation Service Diagram is an interactive element.  Please select the service by moving your cursor over the image and you will get key task listed in a text-box.

Turnkey design for Microcontroller Subsystem
• Specification review
• Logic development
• IP development
• 3rd party IP acquisition
• 3rd party IP verification
• System verification
• Software development
• Modelling & emulation Register transfer level (logic development)
• Synthesis & verification
• Constraints/script setup
• Test structure insertion Gate level (logic implementation)
• Constraints verification
• Net-list verification
• Memory BIST insertion
• Pin-out development
• Test-pattern creation
• Test-program verification Physical Implementation (layout)
• Timing and SI driven layout
• Static timing analysis
• DFM* optimisation
• SI* verification & repair
• ESD verification (simulation)
• Package development
*SI = Signal integrity (considering effects like cross-talk, slew degradation, IR drop, power noise, NBTI, hot carrier,  etc.)
*DFM: Design for manufacturing: Design optimisation to achieve high and stable production yield Sample manufacturing and testing
• Mask making
• Wafer making & die sort
• Packaging
• Test program evaluation
• Final test & shipping Post implementation and qualification
• Sample management
• Evaluation support
• Qualification, ESD & Latch-up
• Mass Production ramp up
• Failure analysis

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