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WCSP - Wafer level Chip Scale Package

WCSP does not use interposer for packaging, the ball is directly mounted on the die.  Pin count is decided by die size and ball pitch.  To achieve high pin counts, ball pitch should be smaller.  Die is coated by Polyimide as insulated material, then ball to IO are connected by copper redistribution routing.  Copper line and overall surface are coated by Epoxy resin and balls are connected through copper post.

Electrical:
RL values are small because the trace is very short and there is no bonding wire.  However, there is no plane.

Thermal:
Heat dissipated from the silicon to PCB through balls directly. Thermal resistance is relatively better than PFBGA.


 

Features:

  • Pin Count: Depends on die size
  • Ball Pitch: 0.5mm / 0.4mm
  • Package Height: 0.72mm typ. (0.5mm pitch ball)
    0.69mm typ. (0.4mm pitch ball)
    0.53mm typ. (0.5mm/0.4mm pitch LGA)
  • Body Size: Same as die size
  • Substrate: No substrate, only epoxy coat on die surface and copper redistribution routing
  • Max Power Dissipation: ~1W @ TA=70C

Benefits:

  • Thin, small and cost effective

 

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