Toshiba is the leader in embedded DRAM technology and is currently shipping its fifth generation of product in high-volume production.
Toshiba EDRAM Features And Benefits:
- High performance with fast data transfer rates due to wide on-chip memory buses
- Much denser than SRAM
- Low power
- Low Soft Error Rates (SER)
- Multiple cores per chip
- System architecture optimization and reduction of discrete components
- Easy and effective testing with a direct-access test and DRAM BIST
- High yield through redundancy in DRAM macros
- Various types of DRAM macros with configurable depth and width
- Trench process - one transistor DRAM cell structure utilizes trench process. The trench capacitor allows for a planar surface topology that enhances reliability without compromising logic performance
- High bandwidth - freed from I/O restrictions, embedded DRAM cores provide high-memory bandwidth with asynchronous interface and a bus width
- selectable from 64-, 128- and 256 bits.
- Configurable Macros - DRAM macros are configurable in depth and width to suit particular application requirements
Further details could be found in the CMOS ASIC Flyer (pdf 1100KB).
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