- Synthesizable 32/16-bit embedded RISC architecture (ARMv5TE)
- Harvard architecture
§ 32 bit ARM® Instruction Set
- 16 bit Thumb® Instruction Set
- MPU – memory protection unit
- AMBA® AHB Interface
- More details from ARM® Limited -
www.arm.com
Features / Services from Toshiba
- Up to 200MHz in 130nm Toshiba CMOS technology @ 125°C / 1,4V
- Flexible Cache for Data & Instruction
- Flexible TCM for Data & Instruction
- Real-time Trace Module: E™9™
Benefits
- Memory protection unit (MPU) supporting all major RTOS (real-time operating systems)
- Flexibility to build embedded devices requiring small size, low cost, low power and high performance for core and cache configuration
- Optimised for small size, low cost and low power (no Java, no MMU, unified AMBA® AHB bus)
- Silicon proven at Toshiba with more then 10 designs in mass production
Applications
- Embedded applications running at RTOS (real-time operating system)
- Portable devices
Abbreviation – Core / Architecture Names
T : Thumb® instruction set
E : DSP Extension
S : Synthesizable
Images courtesy of ARM® Limited -
www.arm.com
Back to Embedded ARM® Cores Home